Performance Predictions for Scaled Process-induced Strained-Si CMOS

نویسندگان

  • G Ranganayakulu
  • C K Maiti
چکیده

Device and circuit simulations using process/physics-based Technology CAD tools are done to project the scaled CMOS speed-performance enhancement that can be expected from process-induced strained-Si CMOS.

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تاریخ انتشار 2008